soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的，含蓄的

牛津词典

adj.

• 软性色情的；（性描写等）隐晦的，含蓄的
  showing or describing sexual activity without being too detailed or shocking

柯林斯词典

• (性描写)非赤裸裸的，较隐晦的
  Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

双语例句

• Then, through the embedded soft-core processor technology based on FPGA, entire system the control, and processing and transmission of data of were achieved by using the co-design approach of hardware and software.
  然后，通过基于FPGA的嵌入式软核处理器技术，采用软硬件协同设计的方法，实现对整个系统功能的控制及数据的处理与发送。
• For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
  对于数字部分，在FPGA内构建SOPC系统，嵌入NIOSii软核处理器对整个系统进行控制。
• The paper introduces the structural features of the network processor Nios II and customized instructions and design methods for forwarding software of the network processor based on the Nios II soft-core processor and design methods for the DSP processor used for the processing of the video and image data.
  文中介绍了网络处理器NIOSii的结构特点和自定义指令以及基于NIOSii软核处理器的网络处理器转发软件的设计方法和基于视频图像处理的DSP处理器的设计方法。
• The hierarchical, modular design idea was used in the system which embeds the Nios II soft-core processor system in FPGA. And the on-chip hardware and software designs are completed.
  整个系统采用层次化、模块化的设计思想，将NIOSii软核处理器系统嵌入到FPGA中，完成片上硬件和软件的设计。
• Implementing the synchronization of industrial Ethernet precise clock based on Nios II soft-core
  基于NiosⅡ软核的工业以太网精确时钟同步的实现
• First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
  第一，运用了在单芯片上实现系统功能的设计思想，采用了高性能的软核处理器（NiosIICPU）和IP复用技术，提高了整个系统的运行速度和进一步改进的灵活性。
• Nios II soft-core processor implanted into FPGA as the control chip controls and preprocesses the data of the entire image acquisition system.
  采用FPGA作为控制芯片，在其中植入NiosⅡ软核处理器以对整个图像采集系统的数据进行控制和预处理。
• The Nios ⅱ soft-core processor improve the integration of the system and is helpful to the miniaturization of instrument.
  NiosⅡ软核处理器提高了系统的集成度，有利于系统的小型化，降低了成本。
• Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
  详细设计了帧间解码IP软核，包括运动矢量生成模块、预测处理模块和插值模块。
• Implementation of Soft-Core Processor and DDFS Based on FPGA
  基于FPGA的软核处理器及DDFS实现